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Output buffer specification #72

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S1J2 opened this issue Jul 25, 2023 · 1 comment
Open

Output buffer specification #72

S1J2 opened this issue Jul 25, 2023 · 1 comment

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@S1J2
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S1J2 commented Jul 25, 2023

Is there some proposed workflow how to simulate some specific ouput buffer? I understand that IBIS will not be part of this simulator. But is there some proposal how to build at least some generic differential output buffer which can translate at least some basic parameters from datasheet or IBIS model? ( slew rate, buffer strength, etc?). OR is there some other approach how to initiate some behavioral modeling of buffer?

@PetePupalaikis
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I would like eventually to add IBIS support, but would probably not really want to handle buffer modeling support (only the AMI portion). This simulator is completely linear, and could allow any linear model to be built of any device and encapsulated into a sub-block. Despite being only linear, I am considering adding the capability of providing (possibly non-linear) behavioral blocks that sense a voltage or current at the inputs, process any function internally, probably by allowing an internal python script, and producing an output waveform at an ideal voltage or current source. This might help, but I'm not sure that's what you'd be looking for.

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