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function-cmos-exp3.sch
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function-cmos-exp3.sch
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DSCH 2.7a
VERSION 23-01-2021 18:44:24
BB(25,-65,334,175)
SYM #pmos
BB(100,-10,120,10)
TITLE 115 -5 #pmos
MODEL 902
PROP 2.0u 0.12u
REC(101,-5,19,15,r)
VIS 2
PIN(120,-10,0.000,0.000)s
PIN(100,0,0.000,0.000)g
PIN(120,10,0.030,0.210)d
LIG(100,0,106,0)
LIG(108,0,108,0)
LIG(110,6,110,-6)
LIG(112,6,112,-6)
LIG(120,-6,112,-6)
LIG(120,-10,120,-6)
LIG(120,6,112,6)
LIG(120,10,120,6)
VLG pmos pmos(drain,source,gate);
FSYM
SYM #pmos
BB(100,20,120,40)
TITLE 115 25 #pmos
MODEL 902
PROP 2.0u 0.12u
REC(101,25,19,15,r)
VIS 2
PIN(120,20,0.000,0.000)s
PIN(100,30,0.000,0.000)g
PIN(120,40,0.030,0.210)d
LIG(100,30,106,30)
LIG(108,30,108,30)
LIG(110,36,110,24)
LIG(112,36,112,24)
LIG(120,24,112,24)
LIG(120,20,120,24)
LIG(120,36,112,36)
LIG(120,40,120,36)
VLG pmos pmos(drain,source,gate);
FSYM
SYM #pmos
BB(100,50,120,70)
TITLE 115 55 #pmos
MODEL 902
PROP 2.0u 0.12u
REC(101,55,19,15,r)
VIS 2
PIN(120,50,0.000,0.000)s
PIN(100,60,0.000,0.000)g
PIN(120,70,0.030,0.420)d
LIG(100,60,106,60)
LIG(108,60,108,60)
LIG(110,66,110,54)
LIG(112,66,112,54)
LIG(120,54,112,54)
LIG(120,50,120,54)
LIG(120,66,112,66)
LIG(120,70,120,66)
VLG pmos pmos(drain,source,gate);
FSYM
SYM #pmos
BB(165,-10,185,10)
TITLE 170 -5 #pmos
MODEL 902
PROP 2.0u 0.12u
REC(165,-5,19,15,r)
VIS 2
PIN(165,-10,0.000,0.000)s
PIN(185,0,0.000,0.000)g
PIN(165,10,0.030,0.210)d
LIG(185,0,179,0)
LIG(177,0,177,0)
LIG(175,6,175,-6)
LIG(173,6,173,-6)
LIG(165,-6,173,-6)
LIG(165,-10,165,-6)
LIG(165,6,173,6)
LIG(165,10,165,6)
VLG pmos pmos(drain,source,gate);
FSYM
SYM #pmos
BB(165,20,185,40)
TITLE 170 25 #pmos
MODEL 902
PROP 2.0u 0.12u
REC(165,25,19,15,r)
VIS 2
PIN(165,20,0.000,0.000)s
PIN(185,30,0.000,0.000)g
PIN(165,40,0.030,0.210)d
LIG(185,30,179,30)
LIG(177,30,177,30)
LIG(175,36,175,24)
LIG(173,36,173,24)
LIG(165,24,173,24)
LIG(165,20,165,24)
LIG(165,36,173,36)
LIG(165,40,165,36)
VLG pmos pmos(drain,source,gate);
FSYM
SYM #pmos
BB(170,50,190,70)
TITLE 175 55 #pmos
MODEL 902
PROP 2.0u 0.12u
REC(170,55,19,15,r)
VIS 2
PIN(170,50,0.000,0.000)s
PIN(190,60,0.000,0.000)g
PIN(170,70,0.030,0.420)d
LIG(190,60,184,60)
LIG(182,60,182,60)
LIG(180,66,180,54)
LIG(178,66,178,54)
LIG(170,54,178,54)
LIG(170,50,170,54)
LIG(170,66,178,66)
LIG(170,70,170,66)
VLG pmos pmos(drain,source,gate);
FSYM
SYM #nmos
BB(70,85,90,105)
TITLE 85 90 #nmos
MODEL 901
PROP 1.0u 0.12u
REC(71,90,19,15,r)
VIS 2
PIN(90,105,0.000,0.000)s
PIN(70,95,0.000,0.000)g
PIN(90,85,0.030,0.420)d
LIG(80,95,70,95)
LIG(80,101,80,89)
LIG(82,101,82,89)
LIG(90,89,82,89)
LIG(90,85,90,89)
LIG(90,101,82,101)
LIG(90,105,90,101)
VLG nmos nmos(drain,source,gate);
FSYM
SYM #nmos
BB(70,115,90,135)
TITLE 85 120 #nmos
MODEL 901
PROP 1.0u 0.12u
REC(71,120,19,15,r)
VIS 2
PIN(90,135,0.000,0.000)s
PIN(70,125,0.000,0.000)g
PIN(90,115,0.030,0.070)d
LIG(80,125,70,125)
LIG(80,131,80,119)
LIG(82,131,82,119)
LIG(90,119,82,119)
LIG(90,115,90,119)
LIG(90,131,82,131)
LIG(90,135,90,131)
VLG nmos nmos(drain,source,gate);
FSYM
SYM #light1
BB(328,60,334,74)
TITLE 330 74 #light
MODEL 49
PROP
REC(329,61,4,4,r)
VIS 1
PIN(330,75,0.000,0.000)out1
LIG(333,66,333,61)
LIG(333,61,332,60)
LIG(329,61,329,66)
LIG(332,71,332,68)
LIG(331,71,334,71)
LIG(331,73,333,71)
LIG(332,73,334,71)
LIG(328,68,334,68)
LIG(330,68,330,75)
LIG(328,66,328,68)
LIG(334,66,328,66)
LIG(334,68,334,66)
LIG(330,60,329,61)
LIG(332,60,330,60)
FSYM
SYM #nmos
BB(135,85,155,105)
TITLE 150 90 #nmos
MODEL 901
PROP 1.0u 0.12u
REC(136,90,19,15,r)
VIS 2
PIN(155,105,0.000,0.000)s
PIN(135,95,0.000,0.000)g
PIN(155,85,0.030,0.420)d
LIG(145,95,135,95)
LIG(145,101,145,89)
LIG(147,101,147,89)
LIG(155,89,147,89)
LIG(155,85,155,89)
LIG(155,101,147,101)
LIG(155,105,155,101)
VLG nmos nmos(drain,source,gate);
FSYM
SYM #nmos
BB(135,115,155,135)
TITLE 150 120 #nmos
MODEL 901
PROP 1.0u 0.12u
REC(136,120,19,15,r)
VIS 2
PIN(155,135,0.000,0.000)s
PIN(135,125,0.000,0.000)g
PIN(155,115,0.030,0.070)d
LIG(145,125,135,125)
LIG(145,131,145,119)
LIG(147,131,147,119)
LIG(155,119,147,119)
LIG(155,115,155,119)
LIG(155,131,147,131)
LIG(155,135,155,131)
VLG nmos nmos(drain,source,gate);
FSYM
SYM #nmos
BB(200,85,220,105)
TITLE 215 90 #nmos
MODEL 901
PROP 1.0u 0.12u
REC(201,90,19,15,r)
VIS 2
PIN(220,105,0.000,0.000)s
PIN(200,95,0.000,0.000)g
PIN(220,85,0.030,0.420)d
LIG(210,95,200,95)
LIG(210,101,210,89)
LIG(212,101,212,89)
LIG(220,89,212,89)
LIG(220,85,220,89)
LIG(220,101,212,101)
LIG(220,105,220,101)
VLG nmos nmos(drain,source,gate);
FSYM
SYM #nmos
BB(200,115,220,135)
TITLE 215 120 #nmos
MODEL 901
PROP 1.0u 0.12u
REC(201,120,19,15,r)
VIS 2
PIN(220,135,0.000,0.000)s
PIN(200,125,0.000,0.000)g
PIN(220,115,0.030,0.070)d
LIG(210,125,200,125)
LIG(210,131,210,119)
LIG(212,131,212,119)
LIG(220,119,212,119)
LIG(220,115,220,119)
LIG(220,131,212,131)
LIG(220,135,220,131)
VLG nmos nmos(drain,source,gate);
FSYM
SYM #CMOS
BB(260,65,300,85)
TITLE 270 63 #notg
MODEL 6000
PROP
REC(265,70,30,10,r)
VIS 5
PIN(260,75,0.000,0.000)in1
PIN(300,75,0.060,0.210)out1
LIG(260,75,265,75)
LIG(295,75,300,75)
LIG(265,70,265,80)
LIG(265,70,295,70)
LIG(295,70,295,80)
LIG(295,80,265,80)
VLG module CMOS inverter-1( in1,out1);
VLG input in1;
VLG output out1;
VLG pmos #(17) pmos(out1,vdd,in1); // 2.0u 0.12u
VLG nmos #(17) nmos(out1,vss,in1); // 1.0u 0.12u
VLG endmodule
FSYM
SYM #vdd
BB(145,-40,155,-30)
TITLE 148 -34 #vdd
MODEL 1
PROP
REC(0,0,0,0,)
VIS 0
PIN(150,-30,0.000,0.000)vdd
LIG(150,-30,150,-35)
LIG(150,-35,145,-35)
LIG(145,-35,150,-40)
LIG(150,-40,155,-35)
LIG(155,-35,150,-35)
FSYM
SYM #vss
BB(145,152,155,160)
TITLE 149 157 #vss
MODEL 0
PROP
REC(145,150,0,0,b)
VIS 0
PIN(150,150,0.000,0.000)vss
LIG(150,150,150,155)
LIG(145,155,155,155)
LIG(145,158,147,155)
LIG(147,158,149,155)
LIG(149,158,151,155)
LIG(151,158,153,155)
FSYM
SYM #button1
BB(71,-4,80,4)
TITLE 75 0 #button
MODEL 59
PROP
REC(72,-3,6,6,r)
VIS 1
PIN(80,0,0.000,0.000)in1
LIG(79,0,80,0)
LIG(71,4,71,-4)
LIG(79,4,71,4)
LIG(79,-4,79,4)
LIG(71,-4,79,-4)
LIG(72,3,72,-3)
LIG(78,3,72,3)
LIG(78,-3,78,3)
LIG(72,-3,78,-3)
FSYM
SYM #button2
BB(205,-4,214,4)
TITLE 210 0 #button
MODEL 59
PROP
REC(207,-3,6,6,r)
VIS 1
PIN(205,0,0.000,0.000)in2
LIG(206,0,205,0)
LIG(214,4,214,-4)
LIG(206,4,214,4)
LIG(206,-4,206,4)
LIG(214,-4,206,-4)
LIG(213,3,213,-3)
LIG(207,3,213,3)
LIG(207,-3,207,3)
LIG(213,-3,207,-3)
FSYM
SYM #button3
BB(71,26,80,34)
TITLE 75 30 #button
MODEL 59
PROP
REC(72,27,6,6,r)
VIS 1
PIN(80,30,0.000,0.000)in3
LIG(79,30,80,30)
LIG(71,34,71,26)
LIG(79,34,71,34)
LIG(79,26,79,34)
LIG(71,26,79,26)
LIG(72,33,72,27)
LIG(78,33,72,33)
LIG(78,27,78,33)
LIG(72,27,78,27)
FSYM
CNC(145 10)
CNC(145 20)
CNC(145 40)
CNC(145 50)
CNC(150 135)
CNC(95 30)
CNC(195 0)
CNC(145 70)
CNC(145 85)
CNC(145 75)
CNC(90 0)
CNC(85 0)
CNC(200 0)
CNC(85 30)
CNC(55 125)
CNC(55 95)
CNC(150 -10)
CNC(120 75)
LIG(80,0,85,0)
LIG(120,-10,150,-10)
LIG(120,10,145,10)
LIG(120,20,145,20)
LIG(120,40,145,40)
LIG(120,50,145,50)
LIG(120,70,145,70)
LIG(145,10,145,20)
LIG(145,10,165,10)
LIG(145,20,165,20)
LIG(145,40,145,50)
LIG(145,40,165,40)
LIG(145,50,170,50)
LIG(90,85,145,85)
LIG(90,105,90,115)
LIG(155,105,155,115)
LIG(220,105,220,115)
LIG(90,135,150,135)
LIG(150,150,150,135)
LIG(150,135,220,135)
LIG(145,70,145,75)
LIG(220,60,190,60)
LIG(220,-50,220,60)
LIG(145,70,170,70)
LIG(145,85,220,85)
LIG(145,75,260,75)
LIG(145,75,145,85)
LIG(300,75,330,75)
LIG(95,-50,220,-50)
LIG(205,0,200,0)
LIG(80,30,85,30)
LIG(195,0,195,30)
LIG(195,0,185,0)
LIG(195,30,185,30)
LIG(90,0,90,60)
LIG(90,0,100,0)
LIG(90,60,100,60)
LIG(95,30,100,30)
LIG(95,30,95,-50)
LIG(85,0,85,-25)
LIG(85,0,90,0)
LIG(85,-25,35,-25)
LIG(35,-25,35,95)
LIG(35,95,55,95)
LIG(200,0,200,-65)
LIG(200,0,195,0)
LIG(200,-65,25,-65)
LIG(25,-65,25,125)
LIG(25,125,55,125)
LIG(85,30,85,75)
LIG(85,30,95,30)
LIG(85,75,120,75)
LIG(135,75,135,95)
LIG(55,125,55,155)
LIG(55,125,70,125)
LIG(55,155,135,155)
LIG(135,155,135,125)
LIG(55,95,55,110)
LIG(55,95,70,95)
LIG(55,110,200,110)
LIG(200,110,200,95)
LIG(150,-30,150,-10)
LIG(150,-10,165,-10)
LIG(120,75,120,175)
LIG(120,75,135,75)
LIG(120,175,200,175)
LIG(200,175,200,125)
FFIG D:\vlsi lab record and ss\function-cmos-exp3.sch