No default MOSI pin (IO13/IO23) exposed, so no 80mhz spi?

[rhapsodyv]

I’m wondering why no default MOSI pin is exposed and if would limit the spi speed, because the need to use not spi matrix pins.

link to note: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/spi_master.html#_CPPv418spi_bus_add_device17spi_host_device_tPK29spi_device_interface_config_tP19spi_device_handle_t

[SebastianLang-GER]

Interesting note, I never noticed this before...

Pins GPIO 13 and 23 are already used for Ethernet PHY communication on this board and therefore are not exposed on the headers.
GPIO 13 = RMII RX ER
GPIO 23 = SMI MDC

See also in this block diagram of the WT32-ETH01:

(Source)

However, RX ER is an optional signal and MDC could be any GPIO pin.
So you could change the circuit to free these pins in your own hardware design...