Skip to content

Latest commit

 

History

History
17 lines (13 loc) · 970 Bytes

README.md

File metadata and controls

17 lines (13 loc) · 970 Bytes

SNKVerilog

Verilog definitions of custom SNK NeoGeo chips, for repairs and preservation.

Details can be found at https://wiki.neogeodev.org/index.php?title=Category:Chips

It seems only Lattice ispMACH4000 devices are 5V-tolerant, small enough and have enough I/Os.

Chip name CPLD Cells used Board done Tested
PCM LC4128ZE
70% ##############------
Nope Nope
NEO-257 LC4064ZE
25% #####---------------
Nope Nope
NEO-273 LC4064ZE
59% ############--------
Nope Nope
NEO-D0 LC4064ZE
62% ############--------
Nope Nope
NEO-G0 XC9572XL
71% ##############------
Nope Nope
NEO-ZMC2 XC9572XL Todo Nope Nope

See [chip name].v for notes about each chip.