Fully parameterizable uart (data width, clock frequency, parity bit [ON/OFF];[ODD/EVEN], stop bit length, baud rate, seniority [DESC/ASC])
-
Updated
Jul 16, 2024 - SystemVerilog
Fully parameterizable uart (data width, clock frequency, parity bit [ON/OFF];[ODD/EVEN], stop bit length, baud rate, seniority [DESC/ASC])
A project called Error Detection Techniques, which checks for errors at the network level to determine if data is corrupt. The project implements an algorithm to practically apply these error detection methods.The core functionality revolves around an algorithm that I implemented, which applies various error detection methods to ensure integrity .
Третья лаба по сетям за 5 семестр: CRC, Parity Control
Data link layer that frames bytes into frames and processes the data while checking for flipped or dropped bits using a parity check
CLI for data error detection that focuses on ParityCheck, Two Dimensional Parity, and Arithmetic Checksum.
[WIP] file verification and repair tool, written in go and rust
"This repository focuses on implementing data link layer error detection codes. Providarious error detection techniques used in data communices methods for vations at the data link layer."
This repository contains various implementations related to computer networking concepts and protocols.
Bit Filling method LDPC code construction method
A simple incoder and decoder of a binary file (generator included) using parity bits.
Hamming code encoder and decoder in C
⏳🛡 Pythonic universal errors-and-erasures Reed-Solomon codec to protect your data from errors and bitrot. Includes a future-proof zero-dependencies pure-python implementation 🔮 and an optional speed-optimized Cython/C extension 🚀
Add a description, image, and links to the parity-check topic page so that developers can more easily learn about it.
To associate your repository with the parity-check topic, visit your repo's landing page and select "manage topics."