VHDL projects done in Xilinx ISE Design Suite during Digital and Embedded Systems course (Układy Cyfrowe i Systemy Wbudowane 1) at the university.
Authors: Wojciech Ormaniec, Bartosz Rodziewicz
I tried my best to describe the task description for each labs. Every solution is widely described (:poland:) in the report which is in /Reports/LabX/. There are missing reports for last two labs, as we didn't have to do them.
The code was written for ZL-9572 (and the two last labs for Spartan3E). More info can be found here (:poland:).