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Trasferring equivalence in the special-case usage of &scorr. Build Posix #386: Commit 9c152b7 pushed by alanminko
September 13, 2024 01:12 14s master
master
September 13, 2024 01:12 14s
Bug(Map): Default value shouldn't be overwritten in USAGE Build Posix #385: Pull request #331 opened by wjrforcyber
September 10, 2024 08:27 10s wjrforcyber:map_default_usage_bug
wjrforcyber:map_default_usage_bug
September 10, 2024 08:27 10s
Another way of writing primary outputs in Verilog. Build Posix #384: Commit 0d10253 pushed by alanminko
September 6, 2024 13:27 4m 10s master
master
September 6, 2024 13:27 4m 10s
Updating "read_lib" to output all gates when gain-based modeling is u… Build Posix #383: Commit 3ddd461 pushed by alanminko
September 6, 2024 00:53 3m 51s master
master
September 6, 2024 00:53 3m 51s
Updating internal cut manager to prefer cuts with high fanin fanout c… Build Posix #382: Commit 3de73f2 pushed by alanminko
September 5, 2024 20:27 4m 1s master
master
September 5, 2024 20:27 4m 1s
Updating &funtrace to trace function of the primary outputs of the AIG. Build Posix #381: Commit 03d9293 pushed by alanminko
September 4, 2024 00:17 3m 58s master
master
September 4, 2024 00:17 3m 58s
Perf improvement in satsolver Build Posix #380: Pull request #328 synchronize by heshpdx
September 3, 2024 04:53 Action required heshpdx:master
heshpdx:master
September 3, 2024 04:53 Action required
Perf improvement in satsolver Build Posix #379: Pull request #328 opened by heshpdx
September 3, 2024 04:32 Action required heshpdx:master
heshpdx:master
September 3, 2024 04:32 Action required
Merge pull request #327 from YosysHQ/povik/aiger-cell-mapping Build Posix #378: Commit 5d6a568 pushed by alanminko
August 28, 2024 20:23 4m 23s master
master
August 28, 2024 20:23 4m 23s
Save cell mapping as new 'M' AIGER extension Build Posix #377: Pull request #327 synchronize by povik
August 28, 2024 20:10 5m 26s YosysHQ:povik/aiger-cell-mapping
YosysHQ:povik/aiger-cell-mapping
August 28, 2024 20:10 5m 26s
Merge pull request #326 from wjrforcyber/resub_markB Build Posix #376: Commit 9371696 pushed by alanminko
August 28, 2024 19:05 4m 5s master
master
August 28, 2024 19:05 4m 5s
Save cell mapping as new 'M' AIGER extension Build Posix #375: Pull request #327 opened by povik
August 28, 2024 14:23 2m 50s YosysHQ:povik/aiger-cell-mapping
YosysHQ:povik/aiger-cell-mapping
August 28, 2024 14:23 2m 50s
Refactor(Resub): Clear markA/B at the beginning Build Posix #374: Pull request #326 synchronize by wjrforcyber
August 28, 2024 08:52 3m 57s wjrforcyber:resub_markB
wjrforcyber:resub_markB
August 28, 2024 08:52 3m 57s
Refactor(Resub): Clear markA/B at the beginning Build Posix #373: Pull request #326 opened by wjrforcyber
August 28, 2024 08:16 3m 56s wjrforcyber:resub_markB
wjrforcyber:resub_markB
August 28, 2024 08:16 3m 56s
Merge pull request #323 from rocallahan/workflow-name Build Posix #372: Commit 64ed5b8 pushed by alanminko
August 24, 2024 16:22 3m 41s master
master
August 24, 2024 16:22 3m 41s
Merge pull request #322 from rocallahan/unit-tests Build Posix #371: Commit 034492b pushed by alanminko
August 24, 2024 16:21 3m 51s master
master
August 24, 2024 16:21 3m 51s
Rename Github Actions job to build-posix-cmake Build Posix #370: Pull request #323 opened by rocallahan
August 23, 2024 04:12 4m 1s rocallahan:workflow-name
rocallahan:workflow-name
August 23, 2024 04:12 4m 1s
Adds unit testing framework to ABC Build Posix #369: Pull request #322 synchronize by rocallahan
August 23, 2024 04:09 3m 51s rocallahan:unit-tests
rocallahan:unit-tests
August 23, 2024 04:09 3m 51s
Adds unit testing framework to ABC Build Posix #368: Pull request #322 opened by rocallahan
August 23, 2024 03:50 3m 48s rocallahan:unit-tests
rocallahan:unit-tests
August 23, 2024 03:50 3m 48s
Regrouping recently added code. Build Posix #367: Commit af77b80 pushed by alanminko
August 18, 2024 20:57 3m 49s master
master
August 18, 2024 20:57 3m 49s
New APIs for AIG package. Build Posix #366: Commit 5e35510 pushed by alanminko
August 18, 2024 20:12 3m 58s master
master
August 18, 2024 20:12 3m 58s
Experiments with adder-based circuits. Build Posix #365: Commit 03b786a pushed by alanminko
August 17, 2024 23:26 3m 49s master
master
August 17, 2024 23:26 3m 49s
Compiler warnings. Build Posix #364: Commit 732abf5 pushed by alanminko
August 17, 2024 04:35 4m 3s master
master
August 17, 2024 04:35 4m 3s
Adding an option to dump satisfying assignments into a BLIF file. Build Posix #363: Commit 2055b1b pushed by alanminko
August 14, 2024 21:41 3m 53s master
master
August 14, 2024 21:41 3m 53s
Adding BLIF dumping to "lutexact". Build Posix #362: Commit c239168 pushed by alanminko
August 14, 2024 03:03 4m 1s master
master
August 14, 2024 03:03 4m 1s