Skip to content
@bespoke-silicon-group

Bespoke Silicon Group

Accelerating productive, PPA-optimal HW Design

Pinned

  1. basejump_stl basejump_stl Public

    BaseJump STL: A Standard Template Library for SystemVerilog

    SystemVerilog 493 96

  2. bsg_manycore bsg_manycore Public

    Tile based architecture designed for computing efficiency, scalability and generality

    SystemVerilog 218 58

  3. bsg_sv2v bsg_sv2v Public

    A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.

    Python 38 10

  4. bsg_packaging bsg_packaging Public

    BaseJump Open-Source Hardware Accelerator Packages and Sockets

    Tcl 8 2

  5. bsg_motherboards bsg_motherboards Public

    BaseJump Open-Source Hardware Accelerator Motherboards

    Verilog 7

  6. bsg_bladerunner bsg_bladerunner Public

    Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)

    Python 36 19

Repositories

Showing 10 of 32 repositories
  • basejump_stl Public

    BaseJump STL: A Standard Template Library for SystemVerilog

    bespoke-silicon-group/basejump_stl’s past year of commit activity
    SystemVerilog 493 96 98 60 Updated Aug 31, 2024
  • bsg_manycore Public

    Tile based architecture designed for computing efficiency, scalability and generality

    bespoke-silicon-group/bsg_manycore’s past year of commit activity
    SystemVerilog 218 58 70 29 Updated Aug 28, 2024
  • hb_hammerbench Public

    HammerBlade Benchmarks

    bespoke-silicon-group/hb_hammerbench’s past year of commit activity
    C++ 0 BSD-3-Clause 0 0 4 Updated Aug 20, 2024
  • bsg_replicant Public

    BSG Replicant: Cosimulation and Emulation Infrastructure for HammerBlade

    bespoke-silicon-group/bsg_replicant’s past year of commit activity
    C++ 26 BSD-3-Clause 20 34 32 Updated Aug 20, 2024
  • bsg_pearls Public

    Open source IP blocks for SoCs and testing collateral. Often consists of compound instantiations of BaseJump STL or other blocks.

    bespoke-silicon-group/bsg_pearls’s past year of commit activity
    SystemVerilog 2 BSD-3-Clause 1 0 2 Updated Aug 16, 2024
  • bsg_newlib_dramfs Public

    newlib, but with a dram-based file system using LittleFS! Also known as Panic Room.

    bespoke-silicon-group/bsg_newlib_dramfs’s past year of commit activity
    C 8 GPL-2.0 1 1 1 Updated Mar 4, 2024
  • bsg_packaging Public

    BaseJump Open-Source Hardware Accelerator Packages and Sockets

    bespoke-silicon-group/bsg_packaging’s past year of commit activity
    Tcl 8 2 7 0 Updated Mar 4, 2024
  • bsg_motherboards Public

    BaseJump Open-Source Hardware Accelerator Motherboards

    bespoke-silicon-group/bsg_motherboards’s past year of commit activity
    Verilog 7 0 3 0 Updated Aug 30, 2023
  • bsg_sv2v Public

    A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.

    bespoke-silicon-group/bsg_sv2v’s past year of commit activity
    Python 38 BSD-3-Clause 10 4 0 Updated Apr 13, 2023
  • hb_starlite Public
    bespoke-silicon-group/hb_starlite’s past year of commit activity
    Shell 2 0 4 2 Updated Mar 25, 2023
View all repositories

People

This organization has no public members. You must be a member to see who’s a part of this organization.

Top languages

Loading…

Most used topics

Loading…