[API] Add incremental compilation #457
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still has issues with fpga backend
still has issues with FPGA backend
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Please ignore the failure in CI/CD test. the runner is basically complaining that you do not have the permission to clone a private repo, which is normal since the CI/CD triggered by a PR does not have that permission. |
Still needs Tensor object
Example can be run in hlib folder : bnn or onnxTodfg
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Add feature: Incremental compilation
Save and load previously created
scheduleobjects.Detailed description: This PR attempts to add support for incremental compilation by saving and loading previously created
scheduleobjects. The MLIR assembly is saved as readable text and the loading is done with the built-in parser.The feature seems to be working for the LLVM backend but has issues with FPGA backend. I will add tests demonstrating these.