PoC cache configuration control

bootloaders/eboot/eboot.c

@@ -68,7 +68,9 @@ int load_app_from_flash_raw(const uint32_t flash_addr)
             load = true;
         }
 
-        if (address >= 0x40100000 && address < 0x40108000) {
+        // The final IRAM size, once boot has completed, can be either 32K or 48K.
+        // Allow for the higher in range testing.
+        if (address >= 0x40100000 && address < 0x4010C000) {
             load = true;
         }
 

cores/esp8266/Arduino.h

@@ -225,6 +225,10 @@ void optimistic_yield(uint32_t interval_us);
 #include <cstdlib>
 #include <cmath>
 
+
+#include "mmu_iram.h"
+
+
 using std::min;
 using std::max;
 using std::round;

cores/esp8266/Esp-frag.cpp

@@ -30,14 +30,15 @@ void EspClass::getHeapStats(uint32_t* hfree, uint16_t* hmax, uint8_t* hfrag)
     // 100 * (1 - sqrt(sum(hole-size²)) / sum(hole-size))
 
     umm_info(NULL, false);
-    uint8_t block_size = umm_block_size();
+
+    uint32_t free_size = umm_free_heap_size_core(umm_get_current_heap());
     if (hfree)
-        *hfree = ummHeapInfo.freeBlocks * block_size;
+        *hfree = free_size;
     if (hmax)
-        *hmax = (uint16_t)ummHeapInfo.maxFreeContiguousBlocks * block_size;
+        *hmax = (uint16_t)umm_max_block_size_core(umm_get_current_heap());
     if (hfrag) {
-      if (ummHeapInfo.freeBlocks) {
-        *hfrag = 100 - (sqrt32(ummHeapInfo.freeBlocksSquared) * 100) / ummHeapInfo.freeBlocks;
+      if (free_size) {
+        *hfrag = umm_fragmentation_metric_core(umm_get_current_heap());
       } else {
         *hfrag = 0;
       }
@@ -46,11 +47,5 @@ void EspClass::getHeapStats(uint32_t* hfree, uint16_t* hmax, uint8_t* hfrag)
 
 uint8_t EspClass::getHeapFragmentation()
 {
-#ifdef UMM_INLINE_METRICS
-    return (uint8_t)umm_fragmentation_metric();
-#else
-    uint8_t hfrag;
-    getHeapStats(nullptr, nullptr, &hfrag);
-    return hfrag;
-#endif
+  return (uint8_t)umm_fragmentation_metric();
 }

cores/esp8266/Esp.cpp

@@ -28,6 +28,8 @@
 #include "cont.h"
 
 #include "coredecls.h"
+#include "umm_malloc/umm_malloc.h"
+// #include "core_esp8266_vm.h"
 #include <pgmspace.h>
 
 extern "C" {
@@ -516,45 +518,45 @@ uint8_t *EspClass::random(uint8_t *resultArray, const size_t outputSizeBytes) co
 {
   /**
    * The ESP32 Technical Reference Manual v4.1 chapter 24 has the following to say about random number generation (no information found for ESP8266):
-   * 
+   *
    * "When used correctly, every 32-bit value the system reads from the RNG_DATA_REG register of the random number generator is a true random number.
    * These true random numbers are generated based on the noise in the Wi-Fi/BT RF system.
    * When Wi-Fi and BT are disabled, the random number generator will give out pseudo-random numbers.
-   * 
+   *
    * When Wi-Fi or BT is enabled, the random number generator is fed two bits of entropy every APB clock cycle (normally 80 MHz).
    * Thus, for the maximum amount of entropy, it is advisable to read the random register at a maximum rate of 5 MHz.
    * A data sample of 2 GB, read from the random number generator with Wi-Fi enabled and the random register read at 5 MHz,
    * has been tested using the Dieharder Random Number Testsuite (version 3.31.1).
    * The sample passed all tests."
-   * 
+   *
    * Since ESP32 is the sequal to ESP8266 it is unlikely that the ESP8266 is able to generate random numbers more quickly than 5 MHz when run at a 80 MHz frequency.
    * A maximum random number frequency of 0.5 MHz is used here to leave some margin for possibly inferior components in the ESP8266.
    * It should be noted that the ESP8266 has no Bluetooth functionality, so turning the WiFi off is likely to cause RANDOM_REG32 to use pseudo-random numbers.
-   * 
-   * It is possible that yield() must be called on the ESP8266 to properly feed the hardware random number generator new bits, since there is only one processor core available. 
+   *
+   * It is possible that yield() must be called on the ESP8266 to properly feed the hardware random number generator new bits, since there is only one processor core available.
    * However, no feeding requirements are mentioned in the ESP32 documentation, and using yield() could possibly cause extended delays during number generation.
    * Thus only delayMicroseconds() is used below.
-   */ 
+   */
 
   constexpr uint8_t cooldownMicros = 2;
   static uint32_t lastCalledMicros = micros() - cooldownMicros;
 
   uint32_t randomNumber = 0;
-  
+
   for(size_t byteIndex = 0; byteIndex < outputSizeBytes; ++byteIndex)
   {
     if(byteIndex % 4 == 0)
     {
       // Old random number has been used up (random number could be exactly 0, so we can't check for that)
-              
+
       uint32_t timeSinceLastCall = micros() - lastCalledMicros;
       if(timeSinceLastCall < cooldownMicros)
         delayMicroseconds(cooldownMicros - timeSinceLastCall);
-      
+
       randomNumber = RANDOM_REG32;
       lastCalledMicros = micros();
     }
-    
+
     resultArray[byteIndex] = randomNumber;
     randomNumber >>= 8;
   }
@@ -969,3 +971,57 @@ String EspClass::getSketchMD5()
     result = md5.toString();
     return result;
 }
+
+void EspClass::enableVM()
+{
+#ifdef UMM_HEAP_EXTERNAL
+    if (!vmEnabled)
+        install_vm_exception_handler();
+    vmEnabled = true;
+#endif
+}
+
+void EspClass::setExternalHeap()
+{
+#ifdef UMM_HEAP_EXTERNAL
+    if (vmEnabled)
+        umm_push_heap(UMM_HEAP_EXTERNAL);
+#endif
+}
+
+void EspClass::setIramHeap()
+{
+#ifdef UMM_HEAP_IRAM
+    umm_push_heap(UMM_HEAP_IRAM);
+#endif
+}
+
+void EspClass::setDramHeap()
+{
+#if defined(UMM_HEAP_EXTERNAL) && !defined(UMM_HEAP_IRAM)
+    if (vmEnabled) {
+        if (!umm_push_heap(UMM_HEAP_DRAM)) {
+            panic();
+        }
+    }
+#elif defined(UMM_HEAP_IRAM)
+    if (!umm_push_heap(UMM_HEAP_DRAM)) {
+        panic();
+    }
+#endif
+}
+
+void EspClass::resetHeap()
+{
+#if defined(UMM_HEAP_EXTERNAL) && !defined(UMM_HEAP_IRAM)
+    if (vmEnabled) {
+        if (!umm_pop_heap()) {
+            panic();
+        }
+    }
+#elif defined(UMM_HEAP_IRAM)
+    if (!umm_pop_heap()) {
+        panic();
+    }
+#endif
+}

cores/esp8266/Esp.h

@@ -123,7 +123,7 @@ class EspClass {
         uint8_t getBootMode();
 
 #if defined(F_CPU) || defined(CORE_MOCK)
-        constexpr 
+        constexpr
 #endif
             inline uint8_t getCpuFreqMHz() const __attribute__((always_inline))
         {
@@ -215,7 +215,15 @@ class EspClass {
 #else
         uint32_t getCycleCount();
 #endif // !defined(CORE_MOCK)
+        void enableVM();
+        void setDramHeap();
+        void setIramHeap();
+        void setExternalHeap();
+        void resetHeap();
     private:
+#ifdef UMM_HEAP_EXTERNAL
+        bool vmEnabled = false;
+#endif
         /**
          * @brief Replaces @a byteCount bytes of a 4 byte block on flash
          *

cores/esp8266/StackThunk.cpp

@@ -31,6 +31,8 @@
 #include "debug.h"
 #include "StackThunk.h"
 #include <ets_sys.h>
+#include <umm_malloc/umm_malloc.h>
+#include <umm_malloc/umm_heap_select.h>
 
 extern "C" {
 
@@ -48,7 +50,14 @@ void stack_thunk_add_ref()
 {
   stack_thunk_refcnt++;
   if (stack_thunk_refcnt == 1) {
+    DBG_MMU_PRINTF("\nStackThunk malloc(%u)\n", _stackSize * sizeof(uint32_t));
+    // The stack must be in DRAM, or an Soft WDT will follow. Not sure why,
+    // maybe too much time is consumed with the non32-bit exception handler.
+    // Also, interrupt handling on an IRAM stack would be very slow.
+    // Strings on the stack would be very slow to access as well.
+    HeapSelectDram ephemeral;
     stack_thunk_ptr = (uint32_t *)malloc(_stackSize * sizeof(uint32_t));
+    DBG_MMU_PRINTF("StackThunk stack_thunk_ptr: %p\n", stack_thunk_ptr);
     if (!stack_thunk_ptr) {
         // This is a fatal error, stop the sketch
         DEBUGV("Unable to allocate BearSSL stack\n");

cores/esp8266/core_esp8266_main.cpp

@@ -35,6 +35,9 @@ extern "C" {
 #include <core_version.h>
 #include "gdb_hooks.h"
 #include "flash_quirks.h"
+#include <umm_malloc/umm_malloc.h>
+#include <core_esp8266_non32xfer.h>
+
 
 #define LOOP_TASK_PRIORITY 1
 #define LOOP_QUEUE_SIZE    1
@@ -204,7 +207,9 @@ static void loop_wrapper() {
 static void loop_task(os_event_t *events) {
     (void) events;
     s_cycles_at_yield_start = ESP.getCycleCount();
+    ESP.resetHeap();
     cont_run(g_pcont, &loop_wrapper);
+    ESP.setDramHeap();
     if (cont_check(g_pcont) != 0) {
         panic();
     }
@@ -256,6 +261,7 @@ void init_done() {
     std::set_terminate(__unhandled_exception_cpp);
     do_global_ctors();
     esp_schedule();
+    ESP.setDramHeap();
 }
 
 /* This is the entry point of the application.
@@ -311,14 +317,22 @@ extern "C" void app_entry_redefinable(void)
     cont_t s_cont __attribute__((aligned(16)));
     g_pcont = &s_cont;
 
+#ifdef DEV_DEBUG_MMU_IRAM
+    DBG_MMU_PRINT_STATUS();
+
+    DBG_MMU_PRINT_IRAM_BANK_REG(0, "");
+
+    DBG_MMU_PRINTF("\nCall call_user_start()\n");
+#endif
+
     /* Call the entry point of the SDK code. */
     call_user_start();
 }
-
 static void app_entry_custom (void) __attribute__((weakref("app_entry_redefinable")));
 
 extern "C" void app_entry (void)
 {
+    umm_init();
     return app_entry_custom();
 }
 
@@ -342,6 +356,12 @@ extern "C" void user_init(void) {
 
     cont_init(g_pcont);
 
+#if defined(NON32XFER_HANDLER) || defined(MMU_IRAM_HEAP)
+    install_non32xfer_exception_handler();
+#endif
+#if defined(MMU_IRAM_HEAP)
+    umm_init_iram();
+#endif
     preinit(); // Prior to C++ Dynamic Init (not related to above init() ). Meant to be user redefinable.
 
     ets_task(loop_task,