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The digital clock hardware and software is a result of a Final-Year Project at SŠIEŘ, Rožnov pod Radhoštěm, Czech Republic as part of the Maturita Exam (A-levels equivalent). All hardware, circuit boards schematics and software written in assembly language are available through an open-source licence.

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kopeckylukas/digital-clock-LKdesign

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Digital Clock

License: MIT

The digital clock hardware and software is a result of a Final-Year Project at SŠIEŘ Rožnov pod Radhoštěm (Czech Republic) as part of Maturita Exam (A-levels equivalent). All hardware, circuit boards schematics and software written in assembly language are available through an open-source licence.

Clock_figure1

About the Project

Hardware
A custom architecture based on Intel Microcontroler i8051/MCS-51 (8-bit, 128B RAM, 4x 8-bit paraler ports, 24MHz). Seven-segment displays are controlled by additional drivers and their intensity is adjustable by a potentiometer on the back panel. Chassis was custom made by SSI Schäfer, s.r.o.
All Cirucit Boards are single-side printed:
LK01-16 - The seven-segment dispalys.
LK02-16 - The main board embeding microcontroller i8051 and Epson real-time chip RTC72421
LK03-16 - The board contains switches for time setting and a potentiometer for adjusting brigthness of the dispaly.

Software Software is developed in an assembly language for Intel microcontrolers series i8051/MSC-51. Insturction set and manuals are available at: http://web.mit.edu/6.115/www/document/8051.pdf

About

The digital clock hardware and software is a result of a Final-Year Project at SŠIEŘ, Rožnov pod Radhoštěm, Czech Republic as part of the Maturita Exam (A-levels equivalent). All hardware, circuit boards schematics and software written in assembly language are available through an open-source licence.

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