Optimize x86 atomic_fence #328
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On x86 (32 and 64-bit) any lock-prefixed instruction provides sequential consistency guarantees for atomic operations and is more efficient than mfence. We are choosing a "lock not" on a dummy byte on the stack for the following reasons: - The "not" instruction does not affect flags or clobber any registers. The memory operand is presumably accessible through esp/rsp. - The dummy byte variable is at the top of the stack, which is likely hot in cache. - The dummy variable does not alias any other data on the stack, which means the "lock not" instruction won't introduce any false data dependencies with prior or following instructions. In order to avoid various sanitizers and valgrind complaining, we have to initialize the dummy variable to zero prior to the operation. Additionally, for memory orders weaker than seq_cst there is no need for any special instructions, and we only need a compiler fence. For the relaxed memory order we don't need even that. This optimization is only enabled for gcc up to version 11. In gcc 11 the compiler implements a similar optimization for std::atomic_thread_fence. Compilers compatible with gcc (namely, clang up to 13 and icc up to 2021.3.0, inclusively) identify themselves as gcc < 11 and also benefit from this optimization, as they otherwise generate mfence for std::atomic_thread_fence(std::memory_order_seq_cst). Signed-off-by: Andrey Semashev <[email protected]>
The necessary instructions according to the memory order argument should already be generated by std::atomic_thread_fence. Signed-off-by: Andrey Semashev <[email protected]>
The code uses memory_order_seq_cst in all call sites of atomic_fence, so remove the argument and simplifiy the implementation a bit. Also, renamed the function to make the memory order it implements apparent. Signed-off-by: Andrey Semashev <[email protected]>
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* Added optimized x86 atomic_fence for gcc-compatible compilers. On x86 (32 and 64-bit) any lock-prefixed instruction provides sequential consistency guarantees for atomic operations and is more efficient than mfence. We are choosing a "lock not" on a dummy byte on the stack for the following reasons: - The "not" instruction does not affect flags or clobber any registers. The memory operand is presumably accessible through esp/rsp. - The dummy byte variable is at the top of the stack, which is likely hot in cache. - The dummy variable does not alias any other data on the stack, which means the "lock not" instruction won't introduce any false data dependencies with prior or following instructions. In order to avoid various sanitizers and valgrind complaining, we have to initialize the dummy variable to zero prior to the operation. Additionally, for memory orders weaker than seq_cst there is no need for any special instructions, and we only need a compiler fence. For the relaxed memory order we don't need even that. This optimization is only enabled for gcc up to version 11. In gcc 11 the compiler implements a similar optimization for std::atomic_thread_fence. Compilers compatible with gcc (namely, clang up to 13 and icc up to 2021.3.0, inclusively) identify themselves as gcc < 11 and also benefit from this optimization, as they otherwise generate mfence for std::atomic_thread_fence(std::memory_order_seq_cst). Signed-off-by: Andrey Semashev <[email protected]> * Removed explicit mfence in atomic_fence on Windows. The necessary instructions according to the memory order argument should already be generated by std::atomic_thread_fence. Signed-off-by: Andrey Semashev <[email protected]> * Removed memory order argument from atomic_fence. The code uses memory_order_seq_cst in all call sites of atomic_fence, so remove the argument and simplifiy the implementation a bit. Also, renamed the function to make the memory order it implements apparent. Signed-off-by: Andrey Semashev <[email protected]>
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The first commit provides an optimized
atomic_fenceimplementation for x86 on gcc-compatible compilers.On x86 (32 and 64-bit) any lock-prefixed instruction provides sequential consistency guarantees for atomic operations and is more efficient than mfence. You can see some tests in this article.
We are choosing a "lock not" on a dummy byte on the stack for the following reasons:
In order to avoid various sanitizers and valgrind complaining, we have to initialize the dummy variable to zero prior to the operation.
Additionally, for memory orders weaker than seq_cst there is no need for any special instructions, and we only need a compiler fence. For the relaxed memory order we don't need even that.
The second commit removes explicit mfence on Windows. The existing
std::atomic_thread_fencealready provides the necessary instructions to maintain memory order according to its argument.