An example of how to use the Xilinx ISE toolchain from the command line
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Updated
Jun 30, 2019 - Makefile
An example of how to use the Xilinx ISE toolchain from the command line
This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim tools
16-bit MIPS processor implemented in Verilog (as a part of Computer Organisation course)
A Verilog based Fractal Set Generator for the Xilinx Artix 7
FPGA Tetris written in Verilog
An 8-bit multiplier is synthesized and simulated in Xilinx ISE using Verilog HDL. The multiplication is performed using Vedic Mathematics which is proved to consume less power and faster than conventional multipliers.
Xilinx Virtual Cable (XVC) Server implementation for use with an Arduino UNO/Leonardo
16 Bit Scientific Calculator Using Xilinx ISE 14.7 on Xilinx ISE, EDA Playground and Simple 4 bit calculator on Spartan 6 Board
My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)
Design of a system bus architecture - Team Project @ ENTC UoM
Tiny 4-bit CPU using AMD2901 bit slice (https://github.com/Amrnasr/AM2901) and program memory initialized from a file
Microgramming technology applied to my multiple cycle CPU
FPGA Messbauer hardware (generator, emulation of signal from gamma-source registered and amplified
My own project in VHDL using ISE Xilinx and FPGA component xc3s200-5ft256
Simple Ping Pong game on Xilinx Spartan 3E
Sobel filter for edge detection in images supporting parallel processing using Verilog on Xilinx ISE 13.4
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